RAM

Most modern RAM chips come in the form of DDR (Double Data Rate) SDRAM memory.

Speed & Timings

DDR chips are classified as DDRX-Y, where X is the DDR generation and Y the maximum clock speed. Because DDR memory triggers on both the up and down latch, the actual bus clock speed driving the module is half the labeled clock speed. For example, a DDR3-1600 is a DDR3 chip running at 800MHz.

Entire memory modules are classified as PCX-Y, where X is the DDR generation and Y the maximum transfer rate in MB/s.

Memory modules may have a different theoretical transfer rate than the individual DDR chips that makes up the module because these chips tend to run below the maximum clock speed. DIMMs send and receive 64 bits of data, so the maximum transfer rate is clock_speed * 64bits Mbits/s.

Memory timings are written as: CL-tRCD-tRP-tRAS-CMD.

CL	The CL number represents the CAS latency (CL, or Access Time). This value denotes how many clock cycles are required for a memory module to return data. A CL7 will require 7 clock cycles for data to be available.
tRCD	The tRCD value is the RAS to CAS delay. The number of clock cycles needed to activate the line (RAS, Row Address Strobe) and column (CAS, Column Address Strobe) of the data.
tRP	The tRP value is the RAS Precharge delay. The number of clock cycles required between disabling and enabling another row.
tRAS	The tRAS value is the Active to Precharge delay. The number of clock cycles required before access to a different row can be initiated.
CMD	The CMD value is the command rate. It is the time required between activation of the module to when the first command can be sent. This is usually omitted but is typically 1 or 2 clock cycles.

See Also

• https://en.wikipedia.org/wiki/DDR3_SDRAM#Modules
• https://www.hardwaresecrets.com/understanding-ram-timings/