DPS5005: Difference between revisions
From Leo's Notes
This page was last edited on 26 September 2019, at 03:59.
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{{code|Readout Protection}} is set to {{code|On}}, which can be changed by changing the Read Protection (RDP) level. There are 3 levels: | |||
* 0: No read protection. | |||
* 1: Read protection enabled. | |||
* 2: Debug/chip read protection disabled. Will disable JTAG, which is bad for our case. | |||
Disable read protection by unlocking it: | |||
{{highlight|lang=text|code= | |||
> stm32f1x unlock 0 | |||
Device Security Bit Set | |||
target halted due to breakpoint, current mode: Handler HardFault | |||
xPSR: 0x61000003 pc: 0x2000003a msp: 0x2000076c | |||
stm32x unlocked. | |||
INFO: a reset or power cycle is required for the new settings to take effect. | |||
> stm32f1x options_read 0 | |||
Option Byte: 0x3fffffc | |||
Readout Protection Off | |||
Software Watchdog | |||
Stop: No reset generated | |||
Standby: No reset generated | |||
User Option0: 0xff | |||
User Option1: 0xff | |||
}} | |||
== See Also == | |||
* https://stackoverflow.com/questions/32509747/stm32-read-out-protection-via-openocd | |||
Revision as of 03:59, 26 September 2019
The DPS5005, and related DPS3005, are variable 'bench' power supply modules.
OpenDPS
The firmware can be overwritten with an open source project called OpenDPS.
JTAG
The DPS power supplies have a STM32 microprocessor. You can use a STLink adapter to access the microprocessor.
- Install OpenOCD.
- Connect the DPS pins GND, SWDIO, and SWCLK to the STLink adapter
- Connect power to the DPS
- Run OpenOCD with
openocd -f interface/stlink-v2.cfg -f target/stm32f1x.cfg.
$ openocd -f interface/stlink-v2.cfg -f target/stm32f1x.cfg
Open On-Chip Debugger 0.10.0
Licensed under GNU GPL v2
For bug reports, read
http://openocd.org/doc/doxygen/bugs.html
Info : auto-selecting first available session transport "hla_swd". To override use 'transport select <transport>'.
Info : The selected transport took over low-level target control. The results might differ compared to plain JTAG/SWD
adapter speed: 1000 kHz
adapter_nsrst_delay: 100
none separate
Info : Unable to match requested speed 1000 kHz, using 950 kHz
Info : Unable to match requested speed 1000 kHz, using 950 kHz
Info : clock speed 950 kHz
Info : STLINK v2 JTAG v17 API v2 SWIM v4 VID 0x0483 PID 0x3748
Info : using stlink api v2
Info : Target voltage: 3.236988
Info : stm32f1x.cpu: hardware has 6 breakpoints, 4 watchpoints
Info : accepting 'telnet' connection on tcp/4444
Telnet to port 4444:
$ telnet localhost 4444
> flash list
{name stm32f1x base 134217728 size 131072 bus_width 0 chip_width 0}
> flash banks
#0 : stm32f1x.flash (stm32f1x) at 0x08000000, size 0x00020000, buswidth 0, chipwidth 0
> halt
target halted due to debug-request, current mode: Handler HardFault
xPSR: 0x61000003 pc: 0x080001d2 msp: 0x200007a8
> stm32f1x options_read 0
Option Byte: 0x3fffffe
Readout Protection On
Software Watchdog
Stop: No reset generated
Standby: No reset generated
User Option0: 0xff
User Option1: 0xff
Readout Protection is set to On, which can be changed by changing the Read Protection (RDP) level. There are 3 levels:
- 0: No read protection.
- 1: Read protection enabled.
- 2: Debug/chip read protection disabled. Will disable JTAG, which is bad for our case.
Disable read protection by unlocking it:
> stm32f1x unlock 0
Device Security Bit Set
target halted due to breakpoint, current mode: Handler HardFault
xPSR: 0x61000003 pc: 0x2000003a msp: 0x2000076c
stm32x unlocked.
INFO: a reset or power cycle is required for the new settings to take effect.
> stm32f1x options_read 0
Option Byte: 0x3fffffc
Readout Protection Off
Software Watchdog
Stop: No reset generated
Standby: No reset generated
User Option0: 0xff
User Option1: 0xff